15
Here you can see all page revisions and compare the changes have been made in each revision. Left column shows the page title and transcription in the selected revision, right column shows what have been changed. Unchanged text is highlighted in white, deleted text is highlighted in red, and inserted text is highlighted in green color.
7 revisions | Khufu at Oct 15, 2023 05:55 PM | |
---|---|---|
151-11-67 CORE SA's Margins with High Speed Memory Checker Board "0" Not Checked Rack 1 B,C,D,E // Prog 16K CBD -9/+10 // CORE 3 In Core 3 current readings 2L // upper // write 1 // Amp 250 ma // duration 560 ns 2L Lower Read 1-4 250 ma 600 ns Ran mechanical margins on SRR | 151-11-67 CORE SA's Margins with High Speed Memory Checker Board "0" Not Checked Back 1 B,C,D,E // Prog 16K CBD -9/10 // CORE 3 In Core 3 current readings 2L // upper // write 1 // [ant?] 250 ma // duration 560 ns 2L Lower Read 1-4 250 ma 600 ns Ran mechanical margins on all modules and connectors in CORE 3 [SRC?] |