15

1-11-67

CORE SA's Margins with High Speed Memory Checker Board

"0" Not Checked
"1" +10/-10
"2" +10/-10
"3" +9.5/-10

Rack 1 B,C,D,E // Prog 16K CBD -9/+10 // CORE 3
Rack 1 L,M // Prog 16K CBD -10/+10 // CORE 3
Rack 2 H,J,K,L // Prog 16K CBD -10/+10 //CORE 3
Rack 6684 // Prog 16K CBD -2.8/+7.8 //CORE 3

In Core 3 current readings
IL131-IL133 Amp 4.5 ma // duration 640ns/1280ns
IL147-IL149 Amp 2.2 ma // duration 1380 - 1440 ns

2L // upper // write 1 // Amp 250 ma // duration 560 ns
2L // upper // write 2 // Amp 250 ma // duration 600 ns
2L // upper // write 3 // Amp 250 ma // duration 540 ns
2L // upper // write 4 // Amp 250 ma // duration 600 ns

2L Lower Read 1-4 250 ma 600 ns

Ran mechanical margins on
all modules and connectors in CORE 3
Found 2 marginal balun boards in 1
and 3 in 1K. Erasing the boards and
working them in and out several times
cured all of them. Core 3 is in
good shape.

SRR