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7 revisions | pwhidden at Mar 30, 2020 11:23 PM | |
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151-11-67 CORE SA's Margins with High Speed Memory Checker Board "0" Not Checked Back 1 B,C,D,E // Prog 16K CBD -9/10 // CORE 3 In Core 3 current readings 2L // upper // write 1 // [ant?] 250 ma // duration 560 ns 2L Lower Read 1-4 250 ma 600 ns Ran mechanical margins on all modules and connectors in CORE 3 [SRC?] | 151-11-67 CORE SA's Margins with High Speed Memory Checker Board "0" Not Checked Back 1 B,C,D,E // Prog 16K CBD -9/10 // CORE 3 In Core 3 current readings 2L // upper // write 1 [ant?] 250 ma // duration 560 ns 2L Lower Read 1-4 250 ma 600 ns Ran mechanical margins on all modules and connectors in CORE 3 [SRC?] |